Leonardo Fpga

FPGA (Field-Programmable Gate Array) Design & Implementation  eBooks & eLearning

Posted by envasel at Jan. 27, 2022
FPGA (Field-Programmable Gate Array) Design & Implementation

FPGA (Field-Programmable Gate Array) Design & Implementation
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz, 2 Ch | Duration: 32 lectures (11h 26m) | 2.96 GB
Genre: eLearning | Language: English + srt

Become FPGA Design Engineer. Learn FPGA Design Engineering, Design Flows & Tools, FPGA DSP Circuits, Protoflex, PLI etc

NI LabVIEW 2018 FPGA Module with Compile Farm Toolkit  Software

Posted by scutter at May 2, 2018
NI LabVIEW 2018 FPGA Module with Compile Farm Toolkit

NI LabVIEW 2018 FPGA Module with Compile Farm Toolkit | 2.2 Gb
Languages: Chinese Simplified, English, Japanese

National Instruments (NI), has announced the release of NI LabVIEW 2018 FPGA Module with Compile Farm Toolkit. With module, you can create VIs that run on NI FPGA targets, such as Reconfigurable I/O (RIO) devices.

NI LabVIEW NXG 4.0 FPGA Module  Software

Posted by scutter at Nov. 8, 2019
NI LabVIEW NXG 4.0 FPGA Module

NI LabVIEW NXG 4.0 FPGA Module | 7.6 Gb
Languages: English, Français, Deutsch, 日本語, 한국어, 中文

National Instruments is pleased to announce the availability of NI LabVIEW NXG 4.0 FPGA Module. This Module helps you develop and debug custom hardware logic that you can compile and deploy to NI FPGA hardware.

Digital System Design with VHDL & Verilog and FPGA Design  eBooks & eLearning

Posted by ELK1nG at Jan. 17, 2022
Digital System Design with VHDL & Verilog and FPGA Design

Digital System Design with VHDL & Verilog and FPGA Design
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz
Language: English | Size: 6.43 GB | Duration: 19h 58m

Model & simulate structure of digital systems with VHDL & Verilog. RTL Systems, FPGA Design Flows & Tools, FPGA Testing.

Step By Step Vhdl Programming For Xilinx Fpga & Cpld  eBooks & eLearning

Posted by ELK1nG at Sept. 2, 2022
Step By Step Vhdl Programming For Xilinx Fpga & Cpld

Step By Step Vhdl Programming For Xilinx Fpga & Cpld
Last updated 8/2021
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz
Language: English | Size: 16.53 GB | Duration: 24h 15m

Learn VHDL Programming for Xilinx FPGA Architecture & PCB Design : Skills suitable for Electronics Engineering Students

Designing Risc-V Cpu In Verilog And Its Fpga Implementation  eBooks & eLearning

Posted by ELK1nG at June 17, 2025
Designing Risc-V Cpu In Verilog And Its Fpga Implementation

Designing Risc-V Cpu In Verilog And Its Fpga Implementation
Published 6/2025
MP4 | Video: h264, 1920x1080 | Audio: AAC, 44.1 KHz
Language: English | Size: 2.82 GB | Duration: 5h 51m

Understanding RISC-V ISA (RV32I), Verilog implementation of custom RISC-V CPU, LED GPIO, UART and porting to FPGA

Fpga Turbo Series  eBooks & eLearning

Posted by ELK1nG at Jan. 9, 2024
Fpga Turbo Series

Fpga Turbo Series
Published 1/2024
MP4 | Video: h264, 1920x1080 | Audio: AAC, 44.1 KHz
Language: English | Size: 3.20 GB | Duration: 2h 7m

Use VHDL to develop FPGA applications that run on development boards

FPGA Programming for Beginners (Repost)  eBooks & eLearning

Posted by AvaxGenius at Feb. 19, 2022
FPGA Programming for Beginners (Repost)

FPGA Programming for Beginners: Bring your ideas to life by creating hardware designs and electronic circuits with SystemVerilog by Frank Bruno
English | PDF,EPUB | 2021 | 369 Pages | ISBN : 1789805414 | 35.3 MB

Get started with FPGA programming using SystemVerilog, and develop real-world skills by building projects, including a calculator and a keyboard

Fpga Filter  eBooks & eLearning

Posted by ELK1nG at July 15, 2022
Fpga Filter

Fpga Filter
Last updated 4/2021
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz
Language: English | Size: 562.83 MB | Duration: 2h 1m

analysis, coding and simulation

Vsd - Mixed-Signal Risc-V Based Soc On Fpga  eBooks & eLearning

Posted by ELK1nG at Dec. 11, 2022
Vsd - Mixed-Signal Risc-V Based Soc On Fpga

Vsd - Mixed-Signal Risc-V Based Soc On Fpga
Last updated 7/2021
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz
Language: English | Size: 752.05 MB | Duration: 1h 15m

FPGA flow for Mixed Signal SoC with RISC-V based core and PLL IP