System on Chip Methodologies & Design Languages

Increasing system complexity has created a pressing need for better design tools and associated methodologies and languages for meeting the stringent time to market and cost constraints. Platform-centric and platfo- based system-on-chip (SoC) design methodologies, based on reuse of software and hardware functionality, has also gained increasing exposure and usage within the Electronic System-Level (ESL) design communities.

Conventional on-chip communication design mostly use ad-hoc approaches that fail to meet the challenges posed by the next-generation MultiCore Systems on-chip (MCSoC) designs.

Applications of Specification and Design Languages for SoCs includes a selection of the best contributions to the Forum on Specification and Design Languages held in 2005 (FDL'05). Since its inception in 1998, FDL has established itself as the premier European forum to exchange experiences and learn about new trends in the application of languages and models for the specification and modeling of electronic systems.

Embedded systems are meanwhile in the focus of industry in quite different application domains such as automotive, avionics, telecom, and consumer products. The need for a shift in design methodologies towards system level design is widely recognised and design flows aimed to an integration of software and hardware specification and implementation approaches are being developed.

Functional verification remains one of the single biggest challenges in the development of complex system-on-chip (SoC) devices. Despite the introduction of successive new technologies, the gap between design capability and verification confidence continues to widen. The biggest problem is that these diverse new technologies have led to a proliferation of verification point tools, most with their own languages and methodologies.