Ascent Lint

Mentor Graphics Corporation, a Siemens business, is pleased to announce the availability of Questa Formal 2021.1. This solution find obscure bugs, increasing design confidence through exhaustive analysis, before simulation test environments are available, and also boost productivity and functional verification quality by targeting verification tasks that are difficult to complete.

Synopsys, Inc., the world leader in semiconductor design software, has unveiled Synopsys SpyGlass vQ-2020.03 SP2-3 – Early Design Analysis Tools Enable Efficient Static Verification of FPGA Designs.

Keil Elektronik GmbH, a developer, manufacturer and distributer embedded software development tools for microcontrollers, announced the release of MDK-ARM 5.23 is the latest release complete software development environment for a wide range of ARM Cortex-M based microcontroller devices. MDK includes the µVision IDE/Debugger, ARM C/C++ Compiler, and essential middleware components. It's easy to learn and use.

Cadence Design Systems, Inc. has unveiled CONFORMAL 23.20.200 is the leading equivalence checker on the market and it does everything from RTL to GDSII.

Cadence Design Systems, Inc., the leader in global electronic design innovation, has released an updated (ISR2) IC 06.17.700 Virtuoso. The Virtuoso suite of tools facilitates the full-custom design of integrated circuits. The suite offers a wide range of design and verification tools that provide complete front-to-back solutions for varying design requirements, such as full-custom integrated circuits and digital integrated circuits.

Cadence Design Systems, Inc. , the leader in global electronic design innovation, has unveiled Virtuoso, Release Version IC6.1.8 ISR30 is a holistic, system-based solution that provides the functionality to drive simulation and LVS-clean layout of ICs and packages from a single schematic.

Cadence Design Systems, Inc. , the leader in global electronic design innovation, has unveiled CONFORMAL 19.10.100. This technologies provide you with an independent equivalence checking solution enabling verification of designs from RTL to final netlists from P&R.

Cadence Design Systems, Inc. , the leader in global electronic design innovation, has unveiled Virtuoso, Release Version IC6.1.8 ISR13 is a holistic, system-based solution that provides the functionality to drive simulation and LVS-clean layout of ICs and packages from a single schematic.

Synopsys, Inc., the world leader in semiconductor design software, has unveiled Synopsys SpyGlass vP-2019.06 SP1.1. Using many advanced algorithms and analysis techniques, this platform provides designers with insight about their design, early in the process at RTL. It functions like an interactive guidance system for design engineers and managers, finding the fastest and least expensive path to implementation for complex SoCs.

Cadence Design Systems, Inc. , the leader in global electronic design innovation, has released Virtuoso, Release Version IC6.1.8 ISR34 is a holistic, system-based solution that provides the functionality to drive simulation and LVS-clean layout of ICs and packages from a single schematic.