Parle 94 Parallel Architectures And Languages Europe

Over the past few years, the demand for high speed Digital Signal Proces­ sing (DSP) has increased dramatically. New applications in real-time image processing, satellite communications, radar signal processing, pattern recogni­ tion, and real-time signal detection and estimation require major improvements at several levels; algorithmic, architectural, and implementation. These perfor­ mance requirements can be achieved by employing parallel processing at all levels. Very Large Scale Integration (VLSI) technology supports and provides a good avenue for parallelism. Parallelism offers efficient sohitions to several problems which can arise in VLSI DSP architectures such as: 1. Intermediate data communication and routing: several DSP algorithms, such as FFT, involve excessive data routing and reordering. Parallelism is an efficient mechanism to minimize the silicon cost and speed up the pro­ cessing time of the intermediate middle stages. 2. Complex DSP applications: the required computation is almost doubled. Parallelism will allow two similar channels processing at the same time.

This book constitutes the refereed proceedings of the 23rd IFIP WG 6.1 International Conference on Coordination Models and Language, COORDINATION 2021, held in Valletta, Malta, in June 2021, as part of the 16th International Federated Conference on Distributed Computing Techniques, DisCoTec 2021.

This book constitutes the refereed proceedings of the 23rd IFIP WG 6.1 International Conference on Coordination Models and Language, COORDINATION 2021, held in Valletta, Malta, in June 2021, as part of the 16th International Federated Conference on Distributed Computing Techniques, DisCoTec 2021.

This book focuses on computing devices and their design at various levels to combat variability. The authors provide a review of key concepts with particular emphasis on timing errors caused by various variability sources