Mastering Fpga Chip Design

Vlsi Design : Unleashing The Power Of Vlsi Technology  eBooks & eLearning

Posted by ELK1nG at April 20, 2024
Vlsi Design : Unleashing The Power Of Vlsi Technology

Vlsi Design : Unleashing The Power Of Vlsi Technology
Published 4/2024
MP4 | Video: h264, 1920x1080 | Audio: AAC, 44.1 KHz
Language: English | Size: 11.01 GB | Duration: 17h 29m

Mastering Principles, Concepts, and Design Methodologies of VLSI followed by Verilog Practical with expert faculty

Hands-On ZYNQ: Mastering AXI4 Bus Protocol  eBooks & eLearning

Posted by Sigha at May 24, 2025
Hands-On ZYNQ: Mastering AXI4 Bus Protocol

Hands-On ZYNQ: Mastering AXI4 Bus Protocol
MP4 | Video: h264, 1920x1080 | Audio: AAC, 44.1 KHz
Language: English (US) | Size: 2.06 GB | Duration: 3h 36m

Create Verilog and C codes for implementing the AXI4 bus protocol on ZYNQ FPGA

Digital IC/FPGA Design P3:Common Used Hardware Architectures  eBooks & eLearning

Posted by lucky_aut at Jan. 1, 2025
Digital IC/FPGA Design P3:Common Used Hardware Architectures

Digital IC/FPGA Design P3:Common Used Hardware Architectures
Published 12/2024
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz
Language: English | Size: 1.1 GB | Duration: 2h 39m

a big step towards complex IP design

Verilog HDL Fundamentals for Digital Design and Verification  eBooks & eLearning

Posted by ELK1nG at Sept. 24, 2021
Verilog HDL Fundamentals for Digital Design and Verification

Verilog HDL Fundamentals for Digital Design and Verification
Genre: eLearning | MP4 | Video: h264, 1280x720 | Audio: AAC, 48.0 KHz
Language: English | Size: 3.36 GB | Duration: 5h 2m

Build a strong Verilog language foundation by implementing combinational / sequential digital circuits and testbenches

Basics and Beyond: STA - Static Timing Analysis  eBooks & eLearning

Posted by lucky_aut at Oct. 17, 2025
Basics and Beyond: STA - Static Timing Analysis

Basics and Beyond: STA - Static Timing Analysis
Published 10/2025
Duration: 7h 3m | .MP4 1280x720 30 fps(r) | AAC, 44100 Hz, 2ch | 2.46 GB
Genre: eLearning | Language: English

Master STA from Novice to Sign-off Timing closure. Learn Setup/Hold, SDC, OCV, PVT, LVF, MMMC, SPEF, TWF, Timing Reports

Verilog Hdl Fundamentals For Digital Design And Verification  eBooks & eLearning

Posted by Sigha at Sept. 12, 2024
Verilog Hdl Fundamentals For Digital Design And Verification

Verilog Hdl Fundamentals For Digital Design And Verification
Last updated 6/2024
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz
Language: English (US) | Size: 1.67 GB | Duration: 5h 23m

Build a strong Verilog language foundation by implementing combinational / sequential digital circuits and testbenches

RTL Finite State Machines in System Verilog  eBooks & eLearning

Posted by lucky_aut at Oct. 7, 2024
RTL Finite State Machines in System Verilog

RTL Finite State Machines in System Verilog
Published 10/2024
Duration: 57m | .MP4 1280x720, 30 fps(r) | AAC, 44100 Hz, 2ch | 382 MB
Genre: eLearning | Language: English

Finite State Machines are a fundamental building block in digital hardware designs.