Risc V System On Chip Design

Building A Risc-V Soc From Scratch!  eBooks & eLearning

Posted by ELK1nG at Dec. 2, 2023
Building A Risc-V Soc From Scratch!

Building A Risc-V Soc From Scratch!
Published 12/2023
MP4 | Video: h264, 1920x1080 | Audio: AAC, 44.1 KHz
Language: English | Size: 3.13 GB | Duration: 6h 16m

System-on-chips, SoC, integration, RTL, FPGA, RISC-V.

Embedded Fun with RISC-V, Part 1: The RISC-V ISA  eBooks & eLearning

Posted by ELK1nG at Jan. 16, 2022
Embedded Fun with RISC-V, Part 1: The RISC-V ISA

Embedded Fun with RISC-V, Part 1: The RISC-V ISA
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz
Language: English | Size: 1.53 GB | Duration: 4h 16m

Get to know the inner workings of the RISC-V architecture.

Embedded Fun with RISC-V, Part 1: The RISC-V ISA  eBooks & eLearning

Posted by yoyoloit at June 15, 2021
Embedded Fun with RISC-V, Part 1: The RISC-V ISA

Embedded Fun with RISC-V, Part 1: The RISC-V ISA
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz, 2 Ch
Genre: eLearning | Language: English + srt | Duration: 53 lectures (2h 43m) | Size: 602.1 MB

Embedded Fun with RISC-V, Part 2: Embedded Applications  eBooks & eLearning

Posted by BlackDove at March 5, 2022
Embedded Fun with RISC-V, Part 2: Embedded Applications

Embedded Fun with RISC-V, Part 2: Embedded Applications
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz, 2 Ch
Genre: eLearning | Language: English + srt | Duration: 95 lectures (4h 41m) | Size: 1.94 GB


Get your hands on a RISC-V microcontroller.

Systemverilog/Uvm For Asic/Soc Verification Part 1  eBooks & eLearning

Posted by ELK1nG at Sept. 19, 2024
Systemverilog/Uvm For Asic/Soc Verification Part 1

Systemverilog/Uvm For Asic/Soc Verification Part 1
Published 9/2024
MP4 | Video: h264, 1920x1080 | Audio: AAC, 44.1 KHz
Language: English | Size: 1.37 GB | Duration: 4h 45m

Basic SystemVerilog/UVM Concepts Explained using AMBA APB Example

Xilinx Vivado Design Suite 2024.1  Software

Posted by scutter at June 5, 2024
Xilinx Vivado Design Suite 2024.1

Xilinx Vivado Design Suite 2024.1 | 114.5 Gb

Xilinx, Inc., the leader in adaptive and intelligent computing, is pleased to announce the availability of Xilinx Vivado Design Suite 2024.1 is a software suite for the design, synthesis and analysis of HDL for its line of FPGAs and SoCs.
Formal and Practical Techniques for the Complex System Design Process using Virtual Prototypes

Formal and Practical Techniques for the Complex System Design Process using Virtual Prototypes:
Better Early than Never

English | 2024 | ISBN: 3031516915 | 194 Pages | PDF EPUB (True) | 21 MB

Cortex-M Blueprints: Practical Architecture, Programming, and System Reference  eBooks & eLearning

Posted by naag at Sept. 16, 2025
Cortex-M Blueprints: Practical Architecture, Programming, and System Reference

Cortex-M Blueprints: Practical Architecture, Programming, and System Reference
English | September 6, 2025 | ASIN: B0FQ49MYMY | 360 pages | EPUB (True) | 579.99 KB

Siemens Mentor Tessent 2021.2  Software

Posted by scutter at Oct. 15, 2023
Siemens Mentor Tessent 2021.2

Siemens Mentor Tessent 2021.2 | 2.0 Gb

Siemens EDA has released Tessent 2021.2 is helps customers address their debug, manufacturing test, yield, functional safety, IC security, and optimization requirements for today’s most complex SoCs.

Siemens Mentor Tessent 2023.1  Software

Posted by scutter at Nov. 27, 2023
Siemens Mentor Tessent 2023.1

Siemens Mentor Tessent 2023.1 | 1.6 Gb

Siemens EDA has released Tessent 2023.1 is helps customers address their debug, manufacturing test, yield, functional safety, IC security, and optimization requirements for today’s most complex SoCs.