Verilog

Fundamentals, Design flow, modeling levels, Datatypes, test bench, Tasks & system tasks, FSM, FPGA & examples & Projects

FPGA Based Design

Build a strong Verilog language foundation by implementing combinational / sequential digital circuits and testbenches

Advance Digital Design using verilog.

VLSI - Interview Guide

ASIC Flow, Verilog Language, Digital Fundamentals, Combinational circuits, Sequential circuits, APB Protocol

Front end VLSI design can’t get easier than this

Model & simulate the structure of digital systems with VHDL & Verilog. RTL Systems, FPGA Testing, Design Flows & Tools.

Build the foundation needed on becoming an expert in Verilog in 4 weeks - Rahsoft Electrical Engineering Department