Lattice Fpga

This book describes the efficient implementation of public-key cryptography (PKC) to address the security challenges of massive amounts of information generated by the vast network of connected devices, ranging from tiny Radio Frequency Identification (RFID) tags to powerful desktop computers. It investigates implementation aspects of post quantum PKC and homomorphic encryption schemes whose security is based on the hardness of the ring-learning with error (LWE) problem. The work includes designing an FPGA-based accelerator to speed up computation on encrypted data in the cloud computer. It also proposes a more practical scheme that uses a special module called recryption box to assist homomorphic function evaluation, roughly 20 times faster than the implementation without this module.

Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for FPGA and ASIC designs, advances VHDL’s verification capabilities with Active-HDL, version 13.0. This latest release introduces support for VHDL-2019 protected types with generics, composites of protected types, pointers to objects of protected types and composition with protected types.

After experiencing record user growth in the past year, Altium has launched the latest version of their leading PCB design software with Altium Designer 17. This release further embodies Altium’s commitment to passionate design by significantly reducing the time spent on non-design related tasks. Designers can leverage several advanced new technologies to center their focus on actual design rather than the mundane tasks that often plague the design process.

The software developer Mentor Graphics, is pleased to announce the availability of HDL Designer Series (HDS) 2019.4 is a powerful HDL-based environment used by individual engineers and engineering teams worldwide to analyze, create and manage complex FPGA and ASIC designs.